JPS593783A - 半導体記憶装置 - Google Patents

半導体記憶装置

Info

Publication number
JPS593783A
JPS593783A JP57111523A JP11152382A JPS593783A JP S593783 A JPS593783 A JP S593783A JP 57111523 A JP57111523 A JP 57111523A JP 11152382 A JP11152382 A JP 11152382A JP S593783 A JPS593783 A JP S593783A
Authority
JP
Japan
Prior art keywords
potential
output
data
clock pulse
high level
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57111523A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6310517B2 (en]
Inventor
Atsushi Oritani
折谷　敦志
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP57111523A priority Critical patent/JPS593783A/ja
Priority to US06/508,505 priority patent/US4539661A/en
Priority to EP83303761A priority patent/EP0098164B1/en
Priority to DE8383303761T priority patent/DE3378939D1/de
Publication of JPS593783A publication Critical patent/JPS593783A/ja
Publication of JPS6310517B2 publication Critical patent/JPS6310517B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G11C11/418—Address circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/18—Address timing or clocking circuits; Address control signal generation or management, e.g. for row address strobe [RAS] or column address strobe [CAS] signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
JP57111523A 1982-06-30 1982-06-30 半導体記憶装置 Granted JPS593783A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP57111523A JPS593783A (ja) 1982-06-30 1982-06-30 半導体記憶装置
US06/508,505 US4539661A (en) 1982-06-30 1983-06-28 Static-type semiconductor memory device
EP83303761A EP0098164B1 (en) 1982-06-30 1983-06-29 Static type semiconductor memory device
DE8383303761T DE3378939D1 (en) 1982-06-30 1983-06-29 Static type semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57111523A JPS593783A (ja) 1982-06-30 1982-06-30 半導体記憶装置

Publications (2)

Publication Number Publication Date
JPS593783A true JPS593783A (ja) 1984-01-10
JPS6310517B2 JPS6310517B2 (en]) 1988-03-07

Family

ID=14563483

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57111523A Granted JPS593783A (ja) 1982-06-30 1982-06-30 半導体記憶装置

Country Status (1)

Country Link
JP (1) JPS593783A (en])

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04113583A (ja) * 1990-08-31 1992-04-15 Nec Ic Microcomput Syst Ltd センスアンプ駆動回路

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0343719U (en]) * 1989-09-04 1991-04-24

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5619587A (en) * 1979-07-27 1981-02-24 Nec Corp Memory circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5619587A (en) * 1979-07-27 1981-02-24 Nec Corp Memory circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04113583A (ja) * 1990-08-31 1992-04-15 Nec Ic Microcomput Syst Ltd センスアンプ駆動回路

Also Published As

Publication number Publication date
JPS6310517B2 (en]) 1988-03-07

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